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Technical Committee on Information Sensing (IST)
Chair: Jun Ohta (NAIST)
Vice Chair: Isamu Takayanagi (Aptina), Shigetoshi Sugawa (Tohoku Univ.)
Secretary: Masayuki Ikebe (Hokkaido Univ.)

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Technical Committee on Integrated Circuits and Devices (IEICE-ICD)
Chair: Kunio Uchiyama (Hitachi) Vice Chair: Masahiko Yoshimoto (Kobe Univ.), Toshihiko Hamasaki (TI)
Secretary: Yoshio Hirose (Fujitsu Labs.), Hiroaki Suzuki (Renesas)
Assistant: Toshimasa Matsuoka (Osaka Univ.), Ken Takeuchi (Univ. of Tokyo), Kenichi Okada (Tokyo Inst. of Tech.)

DATE:
Thu, Jul 22, 2010 09:30 - 18:20
Fri, Jul 23, 2010 09:15 - 17:50

PLACE:
Josho Gakuen Osaka Center(http://www.josho.ac.jp/osakacenter/index.html. Prof. Hiroshi Makino. 06-6346-6367 (Hall))

TOPICS:
Analog, Mixed analog and digital, RF, and sensor interface circuitry

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Thu, Jul 22 AM (09:30 - 13:00)
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(1)/IEICE-ICD 09:30 - 09:55
On-Chip Waveform Capture and Diagnosis of Power Delivery in SoC Integration
Takushi Hashida, Hiroshi Matsumoto, Makoto Nagata (Kobe Univ.)

(2)/IEICE-ICD 09:55 - 10:20
The Minimal Structure of On-Chip Monitoring and Application to Evaluation of Chip Environments
Yuuki Araga, Takushi Hashida, Makoto Nagata (Kobe Univ.)

(3)/IEICE-ICD 10:20 - 10:45
In-situ Evaluation of Vth and AC Gain of 90 nm CMOS Differential Pair Transistors
Yoji Bando, Satoshi Takaya, Takashi Hasegawa (Kobe Univ.), Toru Ohkawa, Masaaki Souda, Toshiharu Takaramoto, Toshio Yamada, Shigetaka Kumashiro, Tohru Mogami (MIRAI-Selete), Makoto Nagata (Kobe Univ.)

(4)/IEICE-ICD 10:45 - 11:10
Buffer-Ring-Based All-Digital On-Chip Monitor for PMOS and NMOS Process Variability
Tetsuya Iizuka, Toru Nakura, Kunihiro Asada (Univ. of Tokyo)

----- Break ( 10 min. ) -----

(5)/IEICE-ICD 11:20 - 12:10
[Invited Talk]
Digital Calibration and Correction Methods for CMOS-ADCs
Shiro Dosho (Pana)

(6)/IEICE-ICD 12:10 - 13:00
[Invited Talk]
A 10b 50MS/s 820uW SAR ADC with on-chip digital calibration
Sanroku Tsukamoto (Fujitsu Labs.)

----- Lunch Break ( 60 min. ) -----

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Thu, Jul 22 PM (14:00 - 18:20)
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(7)/IEICE-ICD 14:00 - 14:50
[Invited Talk]
Digitally-Assisted Analog Test Technology
Haruo Kobayashi, Takahiro J. Yamaguchi (Gunma Univ.)

(8)/IEICE-ICD 14:50 - 15:40
[Invited Talk]
Trend in Multi-mode Multi-band transceivers
Hisayasu Sato (Renesas)

----- Break ( 10 min. ) -----

(9)/IEICE-ICD 15:50 - 16:40
[Invited Talk]
A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer with a Time-Windowed Time-to-Digital Converter
Tadashi Maeda, Takashi Tokairin (Renesas), Masaki Kitsunezuka (NEC), Mitsuji Okada (Renesas), Muneo Fukaishi (NEC)

----- Break ( 10 min. ) -----

(10) 16:50 - 18:20
Panel Discussion

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Fri, Jul 23 AM (09:15 - 12:20)
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(11)/IEICE-ICD 09:15 - 09:40
Implementation of a CMOS Subthreshold Analog Amplifier using 0.5V Power Supply
Tomochika Harada (Yamagata Univ.)

(12)/IEICE-ICD 09:40 - 10:05
OTA Design Using gm/ID Lookup Table Methodology
-- Featuring Settling Time Optimization --
Toru Kashimura, Takayuki Konishi, Shoichi Masui (Tohoku Univ.)

(13)/IEICE-ICD 10:05 - 10:30
Considerations of a common-mode feedback circuit in the CMOS inverter-based differential amplifier.
Masayuki Uno (Linear Cell Design)

(14)/IEICE-ICD 10:30 - 10:55
The Design of a Gm Amplifier with the Improved Linearity by Using the Positive Feedback Compensation Scheme and its Application to High-frequency Filter Design
Yusuke Shimoyama, Yasuhiro Sugimoto (Chuo Univ.)

----- Break ( 10 min. ) -----

(15)/IEICE-ICD 11:05 - 11:30
On-chip background calibration of time-interleaved ADC
Takashi Oshima, Tomomi Takahashi (Hitachi)

(16)/IST 11:30 - 11:55
A/D converter for CMOS Image Sensor with a variable gain amplifier features
Tetsuya Iida, Tomoyuki Akahori (BT), Mohd Amrallah Bin Mustafa, Keita Yastomi, Shoji Kawahito (Shizuoka Univ.)

(17)/IST 11:55 - 12:20
Interleaved ramp wave generator for single slope ADC
Yukinobu Makihara, Shin Muon, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano (Hokkaido Univ.)

----- Lunch Break ( 60 min. ) -----

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Fri, Jul 23 PM (13:20 - 17:50)
----------------------------------------

(18)/IST 13:20 - 14:10
[Invited Talk]
An All-Digital and Scalable Time-Mode A/D Converter TAD
-- Challenge for Sensor Circuit Digitalization --
Takamoto Watanabe (DENSO)

(19)/IST 14:10 - 15:00
[Invited Talk]
TDC and SOI Radiation Image Sensor for Particle Physics
Yasuo Arai (KEK IPNS)

----- Break ( 10 min. ) -----

(20)/IST 15:10 - 15:35
Low noise sensor signal readout circuits with a response time acceleration technique
Mars Kamel, Kawahito Shoji (Shizuoka Univ.)

(21)/IST 15:35 - 16:00
Design and Development of Polarization-Analyzing Image Sensor using 65nm CMOS Process
Sanshiro Shishido, Toshihiko Noda, Kiyotaka Sasagawa, Takashi Tokuda, Jun Ohta (NAIST)

(22)/IEICE-ICD 16:00 - 16:25
User Customizable Logic Paper with 2V Organic CMOS and Ink-Jet Printed Interconnects
Koichi Ishida, Naoki Masunaga, Ryo Takahashi, Tsuyoshi Sekitani (Univ. of Tokyo), higeki Shino (Mitsubishi Paper Mills Ltd.), Ute Zschieschang, Hagen Klauk (Max Planck Institute), Makoto Takamiya, Takao Someya, Takayasu Sakurai (Univ. of Tokyo)

----- Break ( 10 min. ) -----

(23)/IEICE-ICD 16:35 - 17:00
Self-Dithered Digital Delta Sigma Modulators for Fractional-N Frequency Synthesizers
Zule Xu, Jun Gyu Lee, Shoichi Masui (Tohoku Univ.)

(24)/IEICE-ICD 17:00 - 17:25
A Study of High-speed Simulation Method for a Buck & Boost DC-DC Converters
Masahiro Suzuki (Chuo Univ.), Syoko Sugimoto (AdIn), Yasuhiro Sugimoto (Chuo Univ.)

(25)/IEICE-ICD 17:25 - 17:50
Level Converter Circuit for Low Voltage Digital LSIs
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.
Invited Talk will have 40 minutes for presentation and 10 minutes for discussion.

# CONFERENCE SPONSORS:
- This conference is co-sponsored by IEEE SSCS Japan/Kansai Chapter


=== Technical Committee on Information Sensing (IST) ===
# FUTURE SCHEDULE:

Mon, Sep 27, 2010: Kikai-Shinko-Kaikan Bldg. [Fri, Jul 30]
Fri, Oct 22, 2010: [Mon, Aug 9]

# SECRETARY:
Masayuki Ikebe (Hokkaido University)
TEL 011-706-7689,FAX 011-706-7689
E-mail:ikebe@ist.hokudai.ac.jp

=== Technical Committee on Integrated Circuits and Devices (IEICE-ICD) ===

# SECRETARY:
Toshimasa Matsuoka (Osaka University)
TEL 06-6879-7792,FAX 06-6879-7792
E-mail:matsuoka@eei.eng.osaka-u.ac.jp


Last modified: 2010-05-27 18:47:09


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