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Committee Date Time Place Paper Title / Authors Abstract Paper #
IST, IEICE-ICD, IEICE-SDM 2018-08-08
13:15		 Hokkaido Hokkaido University M Bldg. M151 Highly Symmetrical 10T 2-Read/Write Dual-port SRAM Bitcell Design In 28nm High-k/Metal-gate Planar Bulk CMOS Technology
Yuichiro Ishii, Miki Tanaka, Makoto Yabuuchi, Yohei Sawada, Shinji Tanaka, Koji Nii (Renesas), Tien Yu Lu, Chun Hsien Huang, Shou Sian Chen, Yu Tse Kuo, Ching Cheng Lung, Osbert Cheng (UMC) 		 [more]
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