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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST |
2020-03-27
09:50 |
Tokyo |
Kikaishinko kaikan
(Postponed) |
A 1280 x 720 Back-Illuminated Stacked Temporal Contrast Event-based Vision Sensor with 4.86μm Pixels, 1.066GEPS Readout, Programmable Event Rate Controller and Compressive Data Formatting Pipeline
Thomas Finateu (Prophesee), Atsumi Niwa (Sony), Daniel Matolin (Prophesee), Koya Tsuchimoto (Sony), Andrea Mascheroni, Etienne Reynaud (Prophesee), Pooria Mostafalu, Frederick Brady (Sony), Ludovic Chotard, Florian LeGoff (Prophesee), Hirotsugu Takahashi, Hayato Wakabayashi, Yusuke Oike (Sony), Christoph Posch (Prophesee) |
Event-based vision and image sensors, due to large circuitry in each pixel, benefit from wafer-stacking to achieve compe... [more] |
IST2020-10
pp.13-16 |
| IST |
2017-11-13
13:00 |
Tokyo |
Morito memorial Hall |
[Invited Talk]
A 1000fps High-Speed Vision Chip with 3D-Stacked 140GOPS Column-Parallel PEs and its Applications
Shinichi Yoshimura, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Masatsugu Kobayashi, Sayaka Shida, Takashi Izawa, Yoshinori Muramatsu (Sony Semiconductor Solutions Co.), Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto (Sony LSI Design Inc.), Leo Miyashita, Yoshihiro Watanabe, Masatoshi Ishikawa (University of Tokyo) |
A 1/3.2-inch 1.27Mpixel 500fps (0.31Mpixel 1000fps at 2×2 binning mode) vision chip with 3D-stacked CMOS image sensor ha... [more] |
IST2017-60
pp.1-4 |
| IST |
2017-03-10
10:00 |
Tokyo |
NHK Research Lab. Auditorium (Setagaya) |
A 1ms High-Speed Vision Chip with 3D-Stacked 140GOPS Column-Parallel PEs for Spatio-Temporal Image Processing
Masatsugu Kobayashi, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Sayaka Shida (Sony Semiconductor Solutions Co.), Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto (Sony LSI Design Inc.), Leo Miyashita, Yoshihiro Watanabe (University of Tokyo), Takashi Izawa, Yoshinori Muramatsu (Sony Semiconductor Solutions Co.), Masatoshi Ishikawa (University of Tokyo) |
We have developed a 1/3.2-inch 1.27Mpixel 500fps (0.31Mpixel 1000fps 2×2 binning) vision chip with 3D-stacked CMOS image... [more] |
IST2017-9
pp.3-6 |
| IST |
2015-03-27
09:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A 1/1.7-inch 20Mpixel Back-illuminated Stacked CMOS Image Sensor for New Imaging Applications
Toshiki Kainuma, Atsushi Suzuki, Nobutaka Shimamura, Naoki Kawazu, Chihiro Okada, Takumi Oka (Sony), Kensuke Koiso (Sony Semiconductor), Atsushi Masagaki, Yoichi Yagasaki (Sony), Shigeru Gonoi (Sony LSI Design), Tatsuya Ichikawa, Tohru Ueda (Sony), Masatoshi Mizuno (Sony LSI Design), Tatsuya Sugioka, Takafumi Morikawa (Sony) |
We have developed a 1/1.7-inch 20Mpixel back-illuminated stacked CMOS image sensor with parallel multiple sampling, two ... [more] |
IST2015-10
pp.1-4 |
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