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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
IST 2026-03-27
13:10		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Silicon-on-Insulator Pixel FinFET Technology for a High Conversion Gain and Low Dark Noise 2-Layer Transistor Pixel Stacked CIS
Ryohei Takayanagi, Takashi Kamo, Ryosuke Yamachi, Mayu Sakurai, Hidetoshi Oishi, Takuya Iriguchi, Hiroshi Takahashi, Taikei Enomoto, Yuki Kageyama, Yusuke Tanaka, Yoshiaki Kikuchi, Junpei Yamamoto, hideomi kumano, Shinichi Yoshida, Yoshiaki Kitano, Kazunobu Ohta, Tomoyuki Hirano (Sony Semiconductor Solutions) 		This study presents a 2-Layer transistor pixel stacked 0.8-µm dual-pixel (DP) CIS with silicon-on-insulator (SOI) fin fi... [more] IST2026-19
pp.40-43
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