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All Technical Committee Conferences (Searched in: Recent 10 Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST |
2025-03-21
14:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online) |
A 2.1-ns Dead Time 5-μm Single Photon Avalanche Diode with 2-layer Transistor Pixel Technology
Shota Kitamura, Jun Ogi, Fumitaka Sugaya, Junki Suzuki, Aoi Magori, Tomonori Matsui, Kei Sumita, Yuki Ushiku (Sony Semiconductor Solutions), Koji Moriyama, Kenji Toshima (Sony Semiconductor Manufacturing), Tomohiro Namise, Hideki Ozawa, Yasunori Tsukuda, Yusuke Otake, Hiroki Hiyama, Shizunori Matsumoto, Atsushi Suzuki, Fumihiko Koga (Sony Semiconductor Solutions) |
This study reports a 5-$mu$m-pitch single photon avalanche diode (SPAD) with 2-layer transistor pixel technology. The de... [more] |
IST2025-16
pp.27-31 |
| IST |
2023-03-27
15:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online) |
A SPAD Depth Sensor Robust Against Ambient Light : The Importance of Pixel Scaling and Demonstration of a 2.5um Pixel with 21.8% PDE at 940nm
Shohei Shimada, Yusuke Otake, Satoru Yoshida, Yuma Jibiki, Motoharu Fujii, Suzunori Endo, Ryoichi Nakamura, Hidenobu Tsugawa, Yutaro Fujisaki, Kaito Yokochi, Toshihito Iwase, Kosaku Takabayashi, Hidenori Maeda, Keiji Sugihara, Koji Yamamoto, Makoto Ono, Kenzo Ishibashi, Shizunori Matsumoto, Hiroki Hiyama, Toshifumi Wakano (Sony) |
[more] |
IST2023-10
pp.19-22 |
| IST |
2022-03-28
15:40 |
Online |
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A Back Illuminated 6 μm SPAD Pixel Array with High PDE and Timing Jitter Performance
Shohei Shimada, Yusuke Otake, Satoru Yoshida, Suzunori Endo, Ryoichi Nakamura, Hidenobu Tsugawa, Tomohiro Ogita, Takayuki Ogasahara, Kaito Yokochi, Yuji Inoue, Kosaku Takabayashi, Hidenori Maeda, Koji Yamamoto, Makoto Ono, Shizunori Matsumoto, Hiroki Hiyama, Toshifumi Wakano (Sony) |
We present a high-performance Single Photon Avalanche Diode (SPAD) pixel array sensor with 3D-stacked Back Illumination ... [more] |
IST2022-20
pp.43-46 |
| IST |
2017-11-13
13:00 |
Tokyo |
Morito memorial Hall |
[Invited Talk]
A 1000fps High-Speed Vision Chip with 3D-Stacked 140GOPS Column-Parallel PEs and its Applications
Shinichi Yoshimura, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Masatsugu Kobayashi, Sayaka Shida, Takashi Izawa, Yoshinori Muramatsu (Sony Semiconductor Solutions Co.), Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto (Sony LSI Design Inc.), Leo Miyashita, Yoshihiro Watanabe, Masatoshi Ishikawa (University of Tokyo) |
A 1/3.2-inch 1.27Mpixel 500fps (0.31Mpixel 1000fps at 2×2 binning mode) vision chip with 3D-stacked CMOS image sensor ha... [more] |
IST2017-60
pp.1-4 |
| IST |
2017-03-10
10:00 |
Tokyo |
NHK Research Lab. Auditorium (Setagaya) |
A 1ms High-Speed Vision Chip with 3D-Stacked 140GOPS Column-Parallel PEs for Spatio-Temporal Image Processing
Masatsugu Kobayashi, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Sayaka Shida (Sony Semiconductor Solutions Co.), Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto (Sony LSI Design Inc.), Leo Miyashita, Yoshihiro Watanabe (University of Tokyo), Takashi Izawa, Yoshinori Muramatsu (Sony Semiconductor Solutions Co.), Masatoshi Ishikawa (University of Tokyo) |
We have developed a 1/3.2-inch 1.27Mpixel 500fps (0.31Mpixel 1000fps 2×2 binning) vision chip with 3D-stacked CMOS image... [more] |
IST2017-9
pp.3-6 |
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