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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IST 2020-03-27
13:55
Tokyo Kikaishinko kaikan
(Postponed)
Three-layer Stacked Color Image Sensor With 2.0-μm Pixel Size Using Organic Photoconductive Film
Taiichiro Watanabe, Hideaki Togashi, Masahiro Joei, Toshihiko Hayashi, Shintaro Hirata, Shinpei Fukuoka, Yoshihiro Ando, Yusuke Sato, Junpei Yamamoto, Iwao Yagi, Masaki Murata (SSS), Miki Kuribayashi (SONY), Fumihiko Koga, Tetsuji Yamaguchi, Yusuke Oike (SSS), Takayuki Ezaki, Teruo Hirayama (SONY)
 [more] IST2020-17
pp.41-45
IST 2018-03-09
11:00
Tokyo NHK Housou-Gijyutu Lab. A Back-Illuminated Global-Shutter CMOS Image Sensor with Pixel-Parallel 14b Subthreshold ADC
Koji Ogawa, Masaki Sakakibara, Shin Sakai, Yasuhisa Tochigi, Katsumi Honda, Hidekazu Kikuchi, Takuya Wada, Yasunobu Kamikubo, Tsukasa Miura, Masahiko Nakamizo (Sony Semiconductor Solutions), Naoki Jyo, Ryo Hayashibara (Sony Semiconductor Manufacturing), Yohei Furukawa, Shinya Miyata (Sony LSI Design), Satoshi Yamamoto, Yoshiyuki Ota, Hirotsugu Takahashi, Tadayuki Taura, Yusuke Oike, Keiji Tatani, Takayuki Ezaki, Teruo Hirayama (Sony Semiconductor Solutions)
 [more] IST2018-14
pp.13-16
IST 2017-09-25
16:25
Tokyo Kikai-Shinko-Kaikan Bldg. A 224 ke Linear Saturation Signal Global Shutter CMOS Image Sensor with 3.875um pixel, in-pixel Pinned Storage, and Lateral Overflow Integration Capacitor
Shin Sakai, Yorito Sakano, Yoshiaki Tashiro, Yuri Kato, Kentaro Akiyama, Katsumi Honda, Mamoru Sato, Masakai Sakakibara, Tadayuki Taura, Kenji Azami, Tomoyuki Hirano, Yusuke Oike, Yasunori Sogo, Takayuki Ezaki, Tadakuni Narabu, Teruo Hirayama (SSS), Shigetoshi Sugawa (Tohoku Univ.)
 [more] IST2017-59
pp.43-46
IST 2014-03-14
11:30
Tokyo NHK 3D Stacked CMOS Image Sensor
Taku Umebayashi, Tomoharu Ogita, Shunichi Sukegawa, Tsutomu Nakajima, Hiroshi Kawanobe (Sony), Ken Koseki (Sony LSI Design), Tsutomu Haruta, Hiroshi Takahashi (Sony), Keishi Inoue (Sony Semiconductor), Toshifumi Wakano, Yusuke Mada, Koji Fukumoto, Takashi Nagano, Yoshikazu Nitta, Teruo Hirayama (Sony)
We have developed 3D stacked CMOS image sensor. This technology is a Back-illuminated CIS stacking on a logic substrate.... [more] IST2014-9
p.5
IST 2014-03-14
12:00
Tokyo NHK Three-dimensional Structures for High Saturation Signals and Crosstalk Suppression in 1.20 um Pixel Back-Illuminated CMOS Image Sensor
Takekazu Shinohara, Kazufumi Watanabe (Sony Semiconductor), Takashi Abe, Kazunobu Ohta (Sony), Hajime Nakayama (Sony Semiconductor), Takafumi Morikawa, Keiichi Ohno (Sony), Dai Sugimoto (Sony Semiconductor), Shingo Kadomura, Teruo Hirayama (Sony)
We propose two technologies, vertical transfer gate (VTG) and buried shielding metal (BSM), that can be applied to 1.20 ... [more] IST2014-10
pp.7-10
IST, CE 2010-03-26
16:10
Tokyo Kikai-Shinko-Kaikan Bldg. 0.9um Pitch Pixel CMOS Image Sensor Device Design Methodology
Kazuichiro Itonaga, Kyohei Mizuta, Toyotaka Kataoka (Sony), Masashi Yanagita, Shintaro Yamauchi (SCK), Ikeda Harumi, Tsutomu Haruta, Shizunori Matsumoto (Sony), Masanori Harasawa, Takeshi Matsuda, Akira Matsumoto (SCK), Ikue Mizuno (Sony), Takatoshi Kameshima, Iwao Sugiura (SCK), Teruo Hirayama (Sony)
We proposed the constant-light-diffraction methodology in order to design the CMOS image sensor (CIS).
We developed a... [more]
IST2010-20 CE2010-29
pp.55-58
 Results 1 - 6 of 6  /   
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