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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST |
2020-03-27
17:40 |
Tokyo |
Kikaishinko kaikan
(Postponed) |
A 132dB single-exposure dynamic range, CMOS image sensor with high-temperature tolerance
Takahiro Toya, Yorito Sakano, Takahiro Toyoshima, Ryosuke Nakamura, Tomohiko Asatsuma, Yuki Hattori (SSS), Takayuki Yamanaka, Ryoichi Yoshikawa (SCK), Naoki Kawazu, Tomohiro Matsuura, Takahiro Iinuma, Tomohiko Watanabe, Atsushi Suzuki, Yuichi Motohashi, Junichiro Azami, Yasushi Tateshita, Tsutomu Haruta (SSS) |
[more] |
IST2020-26
pp.85-88 |
| IST |
2018-03-09
12:00 |
Tokyo |
NHK Housou-Gijyutu Lab. |
[Invited Talk]
Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology
Hidenobu Tsugawa, Hiroshi Takahashi, Ryoichi Nakamura, Taku Umebayashi, Tomoharu Ogita, Hitoshi Okano, Kazuya Iwase, Hiroyuki Kawashima, Takatsugu Yamasaki, Daisuke Yoneyama, Jun Hashizume, Tsutomu Nakajima, Kenichi Murata, Yoshikazu Kanaishi, Kenji Ikeda, Keiji Tatani, Hajime Nakayama, Tsutomu Haruta, Tetsuo Nomoto (Sony) |
[more] |
IST2018-17
pp.25-29 |
| IST |
2017-03-10
13:20 |
Tokyo |
NHK Research Lab. Auditorium (Setagaya) |
A 1/2.3in 20Mpixel 3-Layer Stacked CMOS Image Sensor with DRAM
Tsutomu Haruta, Tsutomu Nakajima, Jun Hashizume, Taku Umebayashi, Hiroshi Takahashi, Kazuo Taniguchi, Masami Kuroda, Hiroshi Sumihiro, Koji Enoki (Sony Semiconductor Solutions), Takatsugu Yamasaki (Sony Semiconductor Manufacturing), Katsuya Ikezawa, Atsushi Kitahara, Masao Zen, Masafumi Oyama, Hiroki Koga (Sony Semiconductor Solutions) |
[more] |
IST2017-13
pp.19-22 |
| IST |
2014-03-14
11:30 |
Tokyo |
NHK |
3D Stacked CMOS Image Sensor
Taku Umebayashi, Tomoharu Ogita, Shunichi Sukegawa, Tsutomu Nakajima, Hiroshi Kawanobe (Sony), Ken Koseki (Sony LSI Design), Tsutomu Haruta, Hiroshi Takahashi (Sony), Keishi Inoue (Sony Semiconductor), Toshifumi Wakano, Yusuke Mada, Koji Fukumoto, Takashi Nagano, Yoshikazu Nitta, Teruo Hirayama (Sony) |
We have developed 3D stacked CMOS image sensor. This technology is a Back-illuminated CIS stacking on a logic substrate.... [more] |
IST2014-9
p.5 |
| IST, CE |
2010-03-26
16:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
0.9um Pitch Pixel CMOS Image Sensor Device Design Methodology
Kazuichiro Itonaga, Kyohei Mizuta, Toyotaka Kataoka (Sony), Masashi Yanagita, Shintaro Yamauchi (SCK), Ikeda Harumi, Tsutomu Haruta, Shizunori Matsumoto (Sony), Masanori Harasawa, Takeshi Matsuda, Akira Matsumoto (SCK), Ikue Mizuno (Sony), Takatoshi Kameshima, Iwao Sugiura (SCK), Teruo Hirayama (Sony) |
We proposed the constant-light-diffraction methodology in order to design the CMOS image sensor (CIS).
We developed a... [more] |
IST2010-20 CE2010-29
pp.55-58 |
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