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All Technical Committee Conferences  (Searched in: Recent 10 Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IST 2025-03-21
15:00
Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
A 1.25 μm 8K×8K-pixel 60 fps CIS with 2×1 Multi-Directional Phase-Detection Pixels
Kodai Kikuchi, Kohei Tomioka, Takenobu Usui, Akira Honji (NHK), Hiroshi Shimamoto (NHK Foundation), Tomonari Kenzaki, Sota Hida, Takeo Ushinaga, Kenichi Nagai (SSIC), Kazuya Kitamura (NHK)
This paper introduces a 59.3-Mpixel 60 fps back-illuminated stacked CMOS image sensor for immersive content production. ... [more] IST2025-18
pp.37-41
IEICE-ICD, IEICE-SDM, IST [detail] 2024-08-05
16:10
Hokkaido  
(Primary: On-site, Secondary: Online)
A CMOS Temperature Sensor with Threshold Voltage Compensation
Takuto Togashi, Yoshihiro Komatsu, Shen Xiaochi, Masayuki Ikebe (Hokkaido Univ.)
In this study, we designed a temperature sensor that operates in the subthreshold region and does not require calibratio... [more] IST2024-39
pp.6-9
IST 2024-06-19
13:15
Tokyo Tokyo University of Science Morito Memorial Hall [Poster Presentation] A High-Speed and High-Resolution Single-Slope ADC using a Stepless Acceleration Ramp and a Distributed Ramp Signal Generator with Multiple Integral Circuit
Hayato Sakoda, Toshinori Otaka, Shunichi Sato, Takayuki Hamamoto (TUS)
In compact high-resolution image sensors, both high resolution and high speed in ADCs is being demanded. So far, a metho... [more] IST2024-33
pp.5-8
IST 2024-03-27
15:05
Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
An 0.08 e*pJ/step gain-adaptive single-slope ADC with enhanced HDR function for high-quality imagers
Luong Hung, Koji Matsuura, Hiroki Suto, Kazutoshi Kodama, Yosuke Tanaka, Toshiaki Ono, Junichiro Fujimagari, Miho Akahide, Yoshiaki Inada (Sony Semiconductor Solutions)
This paper, which was reported at IEEE Symposium on VLSI circuit 2023, presents a high-speed, power-efficient single-slo... [more] IST2024-20
pp.39-41
IEICE-SDM, IEICE-ICD, IST [detail] 2017-07-31
14:10
Hokkaido Hokkaido-Univ. Multimedia Education Bldg. Time variation reduction of shoot-through current for TDC+Single-Slope ADC architecture
Sayuri Yokoyama, Masayuki Ikebe, Sokuzinn Na, Shinya Takamaeda, Masato Motomura, Tetsuya Asai (Hokkaido Univ.)
We propose a Single-Slope ADC with a time to digital converter(TDC) that uses a quadrature-phase-detection instead of a ... [more] IST2017-42
pp.27-30
IST 2016-03-11
14:50
Tokyo NHK Research Lab (Setagaya) An 18M-pixel CMOS Image Sensor Using 12-bit Column-Parallel Single-Slope ADCs with Operation-Period-Reduced Time-to-Digital Converters
Yoshio Hagihara, Yusaku Koyama, Takanori Tanaka, Atsuko Kume, Yosuke Kusano, Mai Arita, Masashi Saito, Yoshihisa Okada (Olympus)
In this paper, we propose a 12-bit column-parallel single-slope (SS) ADC with operation-period-reduced time-to-digital c... [more] IST2016-16
pp.37-40
 Results 1 - 6 of 6  /   
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