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Paper Abstract and Keywords
Presentation 2011-07-21 10:20
Low-power CMOS logic circuits consisting of cascode structure
Keishi Kubo, Masayuki Ikebe, Yoshihito Amemiya, Eiichi Sano (Hokkaido Univ.)
Abstract (in Japanese) (See Japanese page) 
(in English) We propose using a stack structure to lower the energy consumption of battery-operated CMOS logic circuits. In our stack structure, a logic circuit is composed of stacked many subcircuits, each of which is designed to operate with a voltage far smaller than a battery voltage. The stack of the subcircuits is connected to a battery, and each subcircuit operates efficiently with a divided battery voltage. Our stack structure can efficiently be applied to battery-operated, ultra-low power LSIs such as sensor-network node devices, RFID tags, and internal medical sensing devices.
Keyword (in Japanese) (See Japanese page) 
(in English) CMOS / low-power / cascode / stack / battery / charge-recycling / /  
Reference Info. ITE Tech. Rep., vol. 35, no. 28, IST2011-44, pp. 13-18, July 2011.
Paper # IST2011-44 
Date of Issue 2011-07-14 (IST) 
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970
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Conference Information
Committee IST IEICE-ICD  
Conference Date 2011-07-21 - 2011-07-22 
Place (in Japanese) (See Japanese page) 
Place (in English) Hiroshima Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed analog and digital, RF, and sensor interface circuitry 
Paper Information
Registration To IST 
Conference Code 2011-07-IST-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Low-power CMOS logic circuits consisting of cascode structure 
Sub Title (in English)  
Keyword(1) CMOS  
Keyword(2) low-power  
Keyword(3) cascode  
Keyword(4) stack  
Keyword(5) battery  
Keyword(6) charge-recycling  
1st Author's Name Keishi Kubo  
1st Author's Affiliation Hokkaido University (Hokkaido Univ.)
2nd Author's Name Masayuki Ikebe  
2nd Author's Affiliation Hokkaido University (Hokkaido Univ.)
3rd Author's Name Yoshihito Amemiya  
3rd Author's Affiliation Hokkaido University (Hokkaido Univ.)
4th Author's Name Eiichi Sano  
4th Author's Affiliation Hokkaido University (Hokkaido Univ.)
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Date Time 2011-07-21 10:20:00 
Presentation Time 25 
Registration for IST 
Paper # ITE-IST2011-44 
Volume (vol) ITE-35 
Number (no) no.28 
Page pp.13-18 
#Pages ITE-6 
Date of Issue ITE-IST-2011-07-14 

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