Paper Abstract and Keywords |
Presentation |
2017-03-10 10:00
A 1ms High-Speed Vision Chip with 3D-Stacked 140GOPS Column-Parallel PEs for Spatio-Temporal Image Processing Masatsugu Kobayashi, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Sayaka Shida (Sony Semiconductor Solutions Co.), Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto (Sony LSI Design Inc.), Leo Miyashita, Yoshihiro Watanabe (University of Tokyo), Takashi Izawa, Yoshinori Muramatsu (Sony Semiconductor Solutions Co.), Masatoshi Ishikawa (University of Tokyo) |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We have developed a 1/3.2-inch 1.27Mpixel 500fps (0.31Mpixel 1000fps 2×2 binning) vision chip with 3D-stacked CMOS image sensor. This sensor achieves high resolution and high sensitivity by back-illuminated stacked pixels. In addition, the sensor achieves high speed operation “each pixels” and “each frames” by two kinds of column-parallel processing units. With this technology, it is possible to provide “Visual Feed Back” to the control device with an accuracy that cannot be identified (in units of 1ms) by human eyes. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Column-Parallel process units / Visual Feed Back / 3D-stacked CMOS image sensor / high speed vision chip / 1000fps / / / |
Reference Info. |
ITE Tech. Rep., vol. 41, no. 10, IST2017-9, pp. 3-6, March 2017. |
Paper # |
IST2017-9 |
Date of Issue |
2017-03-03 (IST) |
ISSN |
Print edition: ISSN 1342-6893 Online edition: ISSN 2424-1970 |
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