Paper Abstract and Keywords |
Presentation |
2017-09-25 15:25
Region Control Oriented Stacked CMOS Image Sensor with Array-Parallel ADC Architecture Takahito Yamauchi, Tomohiro Takahashi (Sony Semiconductor Solutions), Yuichi Kaji (Sony Electronics Incorporated), Yasunori Tsukuda, Shinichiro Futami (Sony Semiconductor Solutions), Katsuhiko Hanzawa, Ping Wah Wong, Frederick Brady, Phil Holden, Thomas Ayers (Sony Electronics Incorporated), Kyohei Mizuta, Susumu Ohki, Keiji Tatani, Takashi Nagano (Sony Semiconductor Solutions), Hayato Wakabayashi (Sony Electronics Incorporated), Yoshikazu Nitta (ony Semiconductor Solutions) |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
A 4.1Mpix 280fps stacked CMOS image sensor with array-parallel ADC architecture is developed for region control applications. The combination of an active reset scheme and frame correlated double sampling (CDS) operation cancels Vth variation of pixel amplifier transistors and kTC noise. The sensor utilizes a floating diffusion (FD) based back-illuminated (BI) global shutter (GS) pixel with 2.4e-rms readout noise. An intelligent sensor system with face detection and high resolution region-of-interest (ROI) output is demonstrated with significantly low data bandwidth and low ADC power dissipation by utilizing a flexible area access function. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Array-parallel ADC / Back-illuminated global shutter / Region control / Region of interest / ROI / / / |
Reference Info. |
ITE Tech. Rep., vol. 41, no. 32, IST2017-57, pp. 35-38, Sept. 2017. |
Paper # |
IST2017-57 |
Date of Issue |
2017-09-18 (IST) |
ISSN |
Print edition: ISSN 1342-6893 |
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