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Paper Abstract and Keywords
Presentation 2024-10-04 11:00
Development of single frame sprite drawing hardware in High-level Synthesis
Yuka Otani, Akira Yamawaki (Kyutech)
Abstract (in Japanese) (See Japanese page) 
(in English) As part of a hardware-oriented game library created using high-level synthesis, the development of hardware capable of drawing multiple sprites in a single frame was addressed. As a step of sprite drawing in a single frame, we consider that an effective method of realization is to fill one frame with a transparent color and to overwrite that frame with multiple sprites that are required next frame. In this paper, we develop hardware to realize sprite drawing in a single frame using high-level synthesis. The performance and usefulness of the proposed hardware is verified through experiments using actual devices.
Keyword (in Japanese) (See Japanese page) 
(in English) High-level synthesis (HLS) / FPGA / Sprite / Drawing / Erase / Game libraries / /  
Reference Info. ITE Tech. Rep.
Paper #  
Date of Issue  
ISSN Online edition: ISSN 2424-1970
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Conference Information
Committee IEICE-SIS BCT  
Conference Date 2024-10-03 - 2024-10-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokusei Gakuen Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To IEICE-SIS 
Conference Code 2024-10-SIS-BCT 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Development of single frame sprite drawing hardware in High-level Synthesis 
Sub Title (in English)  
Keyword(1) High-level synthesis (HLS)  
Keyword(2) FPGA  
Keyword(3) Sprite  
Keyword(4) Drawing  
Keyword(5) Erase  
Keyword(6) Game libraries  
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1st Author's Name Yuka Otani  
1st Author's Affiliation Kyushu Institute of Technology (Kyutech)
2nd Author's Name Akira Yamawaki  
2nd Author's Affiliation Kyushu Institute of Technology (Kyutech)
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Speaker Author-1 
Date Time 2024-10-04 11:00:00 
Presentation Time 20 minutes 
Registration for IEICE-SIS 
Paper #  
Volume (vol) vol.48 
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