| Paper Abstract and Keywords |
| Presentation |
2026-08-04 15:15
A Column-Parallel PGA with Dynamic Gain Selection Mitigating SNR Dip
Ren Kinoshita, Toshinori Otaka, Shunichi Sato, Takayuki Hamamoto (TUS) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
In dual conversion gain (DCG) technology, which is widely used to extend the dynamic range of CMOS image sensors, using a high conversion gain to reduce the input-referred noise decreases the number of signal electrons at the switching point to the low conversion gain, resulting in a large SNR dip. In this work, we propose a low-noise readout circuit that suppresses the SNR dip by dynamically optimizing the signal gain of a column-parallel PGA. Specifically, the PGA first starts amplification at its maximum gain, and when output saturation is detected, the feedback factor is adjusted to reduce the gain by one step. By selecting the maximum gain at which the column amplifier does not saturate according to the pixel output voltage level, the proposed circuit greatly reduces the SNR dip and improves the SNR in the low- and middle-illuminance ranges. In addition, the gain switching is overlapped with the pixel readout operation to avoid a loss in readout speed, achieving both tonally seamless high image quality and a high dynamic range. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
CMOS Image Sensor / PGA / SNR Dip / HDR / / / / |
| Reference Info. |
ITE Tech. Rep., vol. 50, no. 21, IST2026-34, pp. 15-20, Aug. 2026. |
| Paper # |
IST2026-34 |
| Date of Issue |
2026-07-28 (IST) |
| ISSN |
Online edition: ISSN 2424-1970 |
| Download PDF |
|
| Conference Information |
| Committee |
IEICE-ICD IEICE-SDM IST |
| Conference Date |
2026-08-04 - 2026-08-06 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Hokkaido Univ, Pharmaceutical Sciences, Lecture Room 2 |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications |
| Paper Information |
| Registration To |
IST |
| Conference Code |
2026-08-ICD-SDM-IST |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
A Column-Parallel PGA with Dynamic Gain Selection Mitigating SNR Dip |
| Sub Title (in English) |
|
| Keyword(1) |
CMOS Image Sensor |
| Keyword(2) |
PGA |
| Keyword(3) |
SNR Dip |
| Keyword(4) |
HDR |
| Keyword(5) |
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| Keyword(6) |
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| Keyword(8) |
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| 1st Author's Name |
Ren Kinoshita |
| 1st Author's Affiliation |
Tokyo University of Science (TUS) |
| 2nd Author's Name |
Toshinori Otaka |
| 2nd Author's Affiliation |
Tokyo University of Science (TUS) |
| 3rd Author's Name |
Shunichi Sato |
| 3rd Author's Affiliation |
Tokyo University of Science (TUS) |
| 4th Author's Name |
Takayuki Hamamoto |
| 4th Author's Affiliation |
Tokyo University of Science (TUS) |
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| Speaker |
Author-1 |
| Date Time |
2026-08-04 15:15:00 |
| Presentation Time |
25 minutes |
| Registration for |
IST |
| Paper # |
IST2026-34 |
| Volume (vol) |
vol.50 |
| Number (no) |
no.21 |
| Page |
pp.15-20 |
| #Pages |
6 |
| Date of Issue |
2026-07-28 (IST) |