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All Technical Committee Conferences (Searched in: Recent 10 Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST |
2023-09-15
14:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online) |
High Full Well Capacity and Low Noise Characteristics in 0.6 μm Pixels via Buried Sublocal Connections in a 2-Layer Transistor Pixel Stacked CMOS Imager Sensor
Keiji Nishida, Masataka Sugimoto, Tatsuya Okawa, Kanta Suzuki, Tomoharu Ogita, Katsunori Hiramatsu, Tomoyuki Hirano, Yoshiaki Kikuchi (SSS), Yuji Nishimura, Kohei Takeuchi, Daisuke Yoneyama, Toru Nagaki, Noriteru Yamada, Hiroyuki Kawashima (SCK), Yoshiaki Kitano (SSS) |
[more] |
IST2023-42
pp.29-32 |
| IST |
2022-09-22
13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online) |
A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency
Chihiro Tomita, Koichiro Zaitsu, Akira Matsumoto, Mizuki Nishida, Yusuke Tanaka, Hirofumi Yamashita, Yusuke Satake (SSS), Takashi Watanabe, Kunihiko Araki, Naoki Nei (SCK), Keiichi Nakazawa, Junpei Yamamoto, Mutsuo Uehara (SSS), Hiroyuki Kawashima, Yusaku Kobayashi (SCK), Tomoyuki Hirano, Keiji Tatani (SSS) |
[more] |
IST2022-34
pp.1-4 |
| IEICE-ICD, IEICE-SDM, IST [detail] |
2022-08-08
09:00 |
Online |
On-line |
[Invited Talk]
A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency
Koichiro Zaitsu, Akira Matsumoto, Mizuki Nishida, Yusuke Tanaka, Hirofumi Yamashita, Yosuke Satake (Sony Semiconductor Solutions), Takashi Watanabe, Kunihiko Araki, Naoki Nei (Sony Semiconductor Manufacturing), Keiichi Nakazawa, Junpei Yamamoto, Mutsuo Uehara (Sony Semiconductor Solutions), Hiroyuki Kawashima, Yusaku Kobayashi (Sony Semiconductor Manufacturing), Tomoyuki Hirano, Keiji Tatani (Sony Semiconductor Solutions) |
[more] |
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| IST |
2018-03-09
12:00 |
Tokyo |
NHK Housou-Gijyutu Lab. |
[Invited Talk]
Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology
Hidenobu Tsugawa, Hiroshi Takahashi, Ryoichi Nakamura, Taku Umebayashi, Tomoharu Ogita, Hitoshi Okano, Kazuya Iwase, Hiroyuki Kawashima, Takatsugu Yamasaki, Daisuke Yoneyama, Jun Hashizume, Tsutomu Nakajima, Kenichi Murata, Yoshikazu Kanaishi, Kenji Ikeda, Keiji Tatani, Hajime Nakayama, Tsutomu Haruta, Tetsuo Nomoto (Sony) |
[more] |
IST2018-17
pp.25-29 |
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