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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 4 of 4  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IST, IEICE-ICD, IEICE-SDM 2018-08-08
13:15
Hokkaido Hokkaido University M Bldg. M151 Highly Symmetrical 10T 2-Read/Write Dual-port SRAM Bitcell Design In 28nm High-k/Metal-gate Planar Bulk CMOS Technology
Yuichiro Ishii, Miki Tanaka, Makoto Yabuuchi, Yohei Sawada, Shinji Tanaka, Koji Nii (Renesas), Tien Yu Lu, Chun Hsien Huang, Shou Sian Chen, Yu Tse Kuo, Ching Cheng Lung, Osbert Cheng (UMC)
 [more]
IST, IEICE-ICD, IEICE-SDM 2018-08-09
12:45
Hokkaido Hokkaido University M Bldg. M151 Study of Impact of BTI's Local Layout Effect Including Recovery Effect on Various Standard-Cells in 10nm FinFET
Mitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii (Renesas)
 [more]
IST, IEICE-ICD, IEICE-SDM 2018-08-09
13:10
Hokkaido Hokkaido University M Bldg. M151 12-nm Fin-FET 3.0G-search/s 80-bit x 128-entry Dual-port Ternary CAM
Makoto Yabuuchi, Masao Morimoto, Koji Nii, Shinji Tanaka (Renesas)
 [more]
IEICE-SDM, IEICE-ICD, IST [detail] 2017-07-31
10:40
Hokkaido Hokkaido-Univ. Multimedia Education Bldg. A 65 nm 1.0V 1.84ns Silicon-on-Thin-Box (SOTB) Embedded SRAM with 13.72 nW/Mbit Standby Power for Smart IoT
Makoto Yabuuchi, Koji Nii (Renesas), Shinozaki Yoshihiro (NSW), Yoshiki Yamamoto, Takumi Hasegawa, Hiroki Shinkawata, Shiro Kamohara (Renesas)
 [more]
 Results 1 - 4 of 4  /   
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