ITE Technical Group Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2013-01-25 10:02
Development of Simulation Model for Oxide Semiconductor Thin-Film Transistors
Hiroshi Tsuji, Mitsuru Nakata, Hiroto Sato, Yoshiki Nakajima, Yoshihide Fujisaki, Tatsuya Takei, Toshihiro Yamamoto, Hideo Fujikake (NHK)
Abstract (in Japanese) (See Japanese page) 
(in English) A new simulation model for current-voltage characteristics of oxide semiconductor thin-film transistors (a-IGZO TFTs) is presented. This model is developed on the basis of the one-dimensional Poisson equation to significantly reduce the calculation time as compared to a widely-used two-dimensional approach. Furthermore, the model takes into account trap states in the band gap, and also includes both drift and diffusion components of the drain current for precise simulation. The developed model can accurately reproduce the drain current characteristics of a-IGZO TFTs over a wide range of gate and drain voltages, which enables faster and accurate TFT structure design, as well as characteristic analyses.
Keyword (in Japanese) (See Japanese page) 
(in English) Oxide semiconductor / Thin-film transistor / Device modeling / Simulation / / / /  
Reference Info. ITE Tech. Rep., vol. 37, no. 2, IDY2013-7, pp. 69-72, Jan. 2013.
Paper # IDY2013-7 
Date of Issue 2013-01-17 (IDY) 
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970
Download PDF

Conference Information
Conference Date 2013-01-24 - 2013-01-25 
Place (in Japanese) (See Japanese page) 
Place (in English) Shizuoka Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To IDY 
Conference Code 2013-01-IDY-EID-EDD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Development of Simulation Model for Oxide Semiconductor Thin-Film Transistors 
Sub Title (in English)  
Keyword(1) Oxide semiconductor  
Keyword(2) Thin-film transistor  
Keyword(3) Device modeling  
Keyword(4) Simulation  
1st Author's Name Hiroshi Tsuji  
1st Author's Affiliation NHK (NHK)
2nd Author's Name Mitsuru Nakata  
2nd Author's Affiliation NHK (NHK)
3rd Author's Name Hiroto Sato  
3rd Author's Affiliation NHK (NHK)
4th Author's Name Yoshiki Nakajima  
4th Author's Affiliation NHK (NHK)
5th Author's Name Yoshihide Fujisaki  
5th Author's Affiliation NHK (NHK)
6th Author's Name Tatsuya Takei  
6th Author's Affiliation NHK (NHK)
7th Author's Name Toshihiro Yamamoto  
7th Author's Affiliation NHK (NHK)
8th Author's Name Hideo Fujikake  
8th Author's Affiliation NHK (NHK)
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Date Time 2013-01-25 10:02:00 
Presentation Time
Registration for IDY 
Paper # ITE-IDY2013-7 
Volume (vol) ITE-37 
Number (no) no.2 
Page pp.69-72 
#Pages ITE-4 
Date of Issue ITE-IDY-2013-01-17 

[Return to Top Page]

[Return to ITE Web Page]

The Institute of Image Information and Television Engineers (ITE), Japan