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Paper Abstract and Keywords
Presentation 2014-03-14 11:30
3D Stacked CMOS Image Sensor
Taku Umebayashi, Tomoharu Ogita, Shunichi Sukegawa, Tsutomu Nakajima, Hiroshi Kawanobe (Sony), Ken Koseki (Sony LSI Design), Tsutomu Haruta, Hiroshi Takahashi (Sony), Keishi Inoue (Sony Semiconductor), Toshifumi Wakano, Yusuke Mada, Koji Fukumoto, Takashi Nagano, Yoshikazu Nitta, Teruo Hirayama (Sony)
Abstract (in Japanese) (See Japanese page) 
(in English) We have developed 3D stacked CMOS image sensor. This technology is a Back-illuminated CIS stacking on a logic substrate. The electrical connections between CIS and logic use the through silicon via (TSV) contacts. By implementing this structure, the chip size is reduced and secures a circuit area on the logic substrate. New functions added on the circuit area have improved imaging quality such as high dynamic range (HDR) movie and clear image zoom.
Keyword (in Japanese) (See Japanese page) 
(in English) CMOS image sensor / Back-illuminated CIS / Three-dimensional Stacking / Small chip size / TSV / HDR / /  
Reference Info. ITE Tech. Rep., vol. 38, no. 15, IST2014-9, pp. 5-5, March 2014.
Paper # IST2014-9 
Date of Issue 2014-03-07 (IST) 
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970
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Conference Information
Committee IST  
Conference Date 2014-03-14 - 2014-03-14 
Place (in Japanese) (See Japanese page) 
Place (in English) NHK 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To IST 
Conference Code 2014-03-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 3D Stacked CMOS Image Sensor 
Sub Title (in English)  
Keyword(1) CMOS image sensor  
Keyword(2) Back-illuminated CIS  
Keyword(3) Three-dimensional Stacking  
Keyword(4) Small chip size  
Keyword(5) TSV  
Keyword(6) HDR  
Keyword(7)  
Keyword(8)  
1st Author's Name Taku Umebayashi  
1st Author's Affiliation Sony Corporation (Sony)
2nd Author's Name Tomoharu Ogita  
2nd Author's Affiliation Sony Corporation (Sony)
3rd Author's Name Shunichi Sukegawa  
3rd Author's Affiliation Sony Corporation (Sony)
4th Author's Name Tsutomu Nakajima  
4th Author's Affiliation Sony Corporation (Sony)
5th Author's Name Hiroshi Kawanobe  
5th Author's Affiliation Sony Corporation (Sony)
6th Author's Name Ken Koseki  
6th Author's Affiliation Sony LSI Design Corporation (Sony LSI Design)
7th Author's Name Tsutomu Haruta  
7th Author's Affiliation Sony Corporation (Sony)
8th Author's Name Hiroshi Takahashi  
8th Author's Affiliation Sony Corporation (Sony)
9th Author's Name Keishi Inoue  
9th Author's Affiliation Sony Semiconductor Corporation (Sony Semiconductor)
10th Author's Name Toshifumi Wakano  
10th Author's Affiliation Sony Corporation (Sony)
11th Author's Name Yusuke Mada  
11th Author's Affiliation Sony Corporation (Sony)
12th Author's Name Koji Fukumoto  
12th Author's Affiliation Sony Corporation (Sony)
13th Author's Name Takashi Nagano  
13th Author's Affiliation Sony Corporation (Sony)
14th Author's Name Yoshikazu Nitta  
14th Author's Affiliation Sony Corporation (Sony)
15th Author's Name Teruo Hirayama  
15th Author's Affiliation Sony Corporation (Sony)
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
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Speaker
Date Time 2014-03-14 11:30:00 
Presentation Time 30 
Registration for IST 
Paper # ITE-IST2014-9 
Volume (vol) ITE-38 
Number (no) no.15 
Page p.5 
#Pages ITE-1 
Date of Issue ITE-IST-2014-03-07 


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