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Paper Abstract and Keywords
Presentation 2015-09-18 16:40
Analysis and Reduction of Floating Diffusion Capacitance Components and Application to High Sensitivity and High Full Well Capacity CMOS Image Sensor
Fumiaki Kusuhara, Shunichi Wakashima, Satoshi Nasuno, Rihito Kuroda, Shigetoshi Sugawa (Tohoku Univ.)
Abstract (in Japanese) (See Japanese page) 
(in English) This paper reports the analysis and reduction technology of components of floating diffusion (FD) capacitance (CFD) and its application to a high sensitivity and high full well capacity CMOS image sensor. We analyzed the result of CFD components extracted by the developed test patterns, and proposed FD structure with non-LDD and low concentration diffusion layer to reduce CFD. CMOS image sensor which has 360H×1680V pixels fabricated by 0.18um CMOS process technology with lateral overflow integration capacitor (LOFIC), dual gain column amplifier, floating capacitor load readout operation, buried channel pixel source follower (SF) transistor and low CFD device structure was evaluated and it exhibited 243uV/e- of conversion gain (CG), 0.46e-rms of readout noise, and 76ke- of full well capacity (FWC).
Keyword (in Japanese) (See Japanese page) 
(in English) Floating Diffusion Capacitance / Lateral Overflow Integration Capacitor / High Sensitivity / High Full Well Capacity / / / /  
Reference Info. ITE Tech. Rep., vol. 39, no. 35, IST2015-56, pp. 53-56, Sept. 2015.
Paper # IST2015-56 
Date of Issue 2015-09-11 (IST) 
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970

Conference Information
Committee IST  
Conference Date 2015-09-18 - 2015-09-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To IST 
Conference Code 2015-09-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Analysis and Reduction of Floating Diffusion Capacitance Components and Application to High Sensitivity and High Full Well Capacity CMOS Image Sensor 
Sub Title (in English)  
Keyword(1) Floating Diffusion Capacitance  
Keyword(2) Lateral Overflow Integration Capacitor  
Keyword(3) High Sensitivity  
Keyword(4) High Full Well Capacity  
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1st Author's Name Fumiaki Kusuhara  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Shunichi Wakashima  
2nd Author's Affiliation Tohoku University (Tohoku Univ.)
3rd Author's Name Satoshi Nasuno  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
4th Author's Name Rihito Kuroda  
4th Author's Affiliation Tohoku University (Tohoku Univ.)
5th Author's Name Shigetoshi Sugawa  
5th Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker
Date Time 2015-09-18 16:40:00 
Presentation Time 30 
Registration for IST 
Paper # ITE-IST2015-56 
Volume (vol) ITE-39 
Number (no) no.35 
Page pp.53-56 
#Pages ITE-4 
Date of Issue ITE-IST-2015-09-11 


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