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Paper Abstract and Keywords
Presentation 2017-10-19 14:45
Domain wall motion control in the Co/Ni-nanowire-based magnetic shift register
Tsuyoshi Kondo, Takuya Shimada, Masaki Kado, Michael Quinsat, Yasuaki Ootera, Nobuyuki Umetsu, Susumu Hashimoto, Shiho Nakamura (Toshiba)
Abstract (in Japanese) (See Japanese page) 
(in English) We have been studying on the magnetic shift register(MSR) using magnetic nanowire, as one of the candidates for the ultra-large scale nonvolatile memory utilized in the solid state data storage in next generation. In this report, we show the recent progress of our studies on the MSR. Primarily, the technology related to precise control of magnetic domain wall in the nanowire, which is imperative to maintain data in the MSR, is introduced.
Keyword (in Japanese) (See Japanese page) 
(in English) solid-state data storage / nonvolatile memory / magnetic shift register / current-induced domain wall motion / / / /  
Reference Info. ITE Tech. Rep.
Paper #  
Date of Issue  
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.
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Conference Information
Committee IEICE-MRIS MMS  
Conference Date 2017-10-19 - 2017-10-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Kashiwazaki energy hall, Niigata 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Recording Head, Spintronics, etc. 
Paper Information
Registration To IEICE-MRIS 
Conference Code 2017-10-MR-MMS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Domain wall motion control in the Co/Ni-nanowire-based magnetic shift register 
Sub Title (in English)  
Keyword(1) solid-state data storage  
Keyword(2) nonvolatile memory  
Keyword(3) magnetic shift register  
Keyword(4) current-induced domain wall motion  
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1st Author's Name Tsuyoshi Kondo  
1st Author's Affiliation Toshiba Corporation (Toshiba)
2nd Author's Name Takuya Shimada  
2nd Author's Affiliation Toshiba Corporation (Toshiba)
3rd Author's Name Masaki Kado  
3rd Author's Affiliation Toshiba Corporation (Toshiba)
4th Author's Name Michael Quinsat  
4th Author's Affiliation Toshiba Corporation (Toshiba)
5th Author's Name Yasuaki Ootera  
5th Author's Affiliation Toshiba Corporation (Toshiba)
6th Author's Name Nobuyuki Umetsu  
6th Author's Affiliation Toshiba Corporation (Toshiba)
7th Author's Name Susumu Hashimoto  
7th Author's Affiliation Toshiba Corporation (Toshiba)
8th Author's Name Shiho Nakamura  
8th Author's Affiliation Toshiba Corporation (Toshiba)
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Speaker
Date Time 2017-10-19 14:45:00 
Presentation Time 25 
Registration for IEICE-MRIS 
Paper #  
Volume (vol) ITE-41 
Number (no)  
Page  
#Pages ITE- 
Date of Issue  


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