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Paper Abstract and Keywords
Presentation 2018-03-09 11:20
A 2.1μm 33Mpixel CMOS imager with multi-functional 3-stage pipeline ADC for 480fps high-speed mode and 120fps low-noise mode
Kohei Tomioka, Toshio Yasue, Ryohei Funatsu, Tomohiro Nakamura (NHK STR), Takahiro Yamasaki (NHK Engineering Administration Department), Hiroshi Shimamoto (NHK STR), Tomohiko Kosugi, Sungwook Jun, Takashi Watanabe, Masanori Nagase, Toshiaki Kitajima, Satoshi Aoyama (Brookman Technology), Shoji Kawahito (Shizuoka University)
Abstract (in Japanese) (See Japanese page) 
(in English) A 2.1μm 33Mpixel CMOS for 8K video is described. A novel column parallel 3-stage pipeline ADC composed of FI (Folding-Integration), dual-cyclic and SAR provides multiple operation modes. In the 120fps 14bit mode, the 6-times of sampling in the FI and digital CDS reduce random noise and VFPN to 3.2 e- and 0.24e-, respectively. In the 480fps mode, the dual-cyclic and SAR achieve 480fps operation. The dual-cyclic ADC has two sampling capacitors and omit feedback phase by using them alternately. We have developed an 8K 240fps single-chip high speed image capture equipment using this imager.
Keyword (in Japanese) (See Japanese page) 
(in English) 8K SHV / CMOS imager / 3-stage pipeline ADC / 480fps / high speed imaging / low noise / /  
Reference Info. ITE Tech. Rep., vol. 42, no. 10, IST2018-15, pp. 17-20, March 2018.
Paper # IST2018-15 
Date of Issue 2018-03-02 (IST) 
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970
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Conference Information
Committee IST  
Conference Date 2018-03-09 - 2018-03-09 
Place (in Japanese) (See Japanese page) 
Place (in English) NHK Housou-Gijyutu Lab. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Image Sensors, etc. 
Paper Information
Registration To IST 
Conference Code 2018-03-IST 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 2.1μm 33Mpixel CMOS imager with multi-functional 3-stage pipeline ADC for 480fps high-speed mode and 120fps low-noise mode 
Sub Title (in English)  
Keyword(1) 8K SHV  
Keyword(2) CMOS imager  
Keyword(3) 3-stage pipeline ADC  
Keyword(4) 480fps  
Keyword(5) high speed imaging  
Keyword(6) low noise  
Keyword(7)  
Keyword(8)  
1st Author's Name Kohei Tomioka  
1st Author's Affiliation NHK Science & Technology Research Laboratories (NHK STR)
2nd Author's Name Toshio Yasue  
2nd Author's Affiliation NHK Science & Technology Research Laboratories (NHK STR)
3rd Author's Name Ryohei Funatsu  
3rd Author's Affiliation NHK Science & Technology Research Laboratories (NHK STR)
4th Author's Name Tomohiro Nakamura  
4th Author's Affiliation NHK Science & Technology Research Laboratories (NHK STR)
5th Author's Name Takahiro Yamasaki  
5th Author's Affiliation NHK Engineering Administration Department (NHK Engineering Administration Department)
6th Author's Name Hiroshi Shimamoto  
6th Author's Affiliation NHK Science & Technology Research Laboratories (NHK STR)
7th Author's Name Tomohiko Kosugi  
7th Author's Affiliation Brookman Technology Inc. (Brookman Technology)
8th Author's Name Sungwook Jun  
8th Author's Affiliation Brookman Technology Inc. (Brookman Technology)
9th Author's Name Takashi Watanabe  
9th Author's Affiliation Brookman Technology Inc. (Brookman Technology)
10th Author's Name Masanori Nagase  
10th Author's Affiliation Brookman Technology Inc. (Brookman Technology)
11th Author's Name Toshiaki Kitajima  
11th Author's Affiliation Brookman Technology Inc. (Brookman Technology)
12th Author's Name Satoshi Aoyama  
12th Author's Affiliation Brookman Technology Inc. (Brookman Technology)
13th Author's Name Shoji Kawahito  
13th Author's Affiliation Shizuoka University (Shizuoka University)
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Speaker
Date Time 2018-03-09 11:20:00 
Presentation Time 20 
Registration for IST 
Paper # ITE-IST2018-15 
Volume (vol) ITE-42 
Number (no) no.10 
Page pp.17-20 
#Pages ITE-4 
Date of Issue ITE-IST-2018-03-02 


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