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Paper Abstract and Keywords
Presentation 2018-11-28 16:30
[Poster Presentation] CMOS Image Sensor with Pseudorandom Pixel Placement For Jaggy Elmination
Junichi Akia (Kanazawa Univ.)
Abstract (in Japanese) (See Japanese page) 
(in English) The pixels in the conventional image sensors are placed at lattice positions, and this causes the jaggies at the edge of the slant line we perceive, which is hard to resolve by pixel size reduction. The author has been proposing the method of reducing the jaggies effect by arranging the photo diode at pseudorandom positions, with keeping the lattice arrangement of pixel boundaries that are compatible with the conventional image sensor architecture. In this paper, the author discusses the design of CMOS image sensor with pseudorandom pixel placement, as well as the preliminary evaluation of the fabricated CMOS image sensor.
Keyword (in Japanese) (See Japanese page) 
(in English) CMOS Image Sensor / Jaggy / displacement / Vernier accuracy / / / /  
Reference Info. ITE Tech. Rep., vol. 42, no. 40, IST2018-61, pp. 5-6, Nov. 2018.
Paper # IST2018-61 
Date of Issue 2018-11-21 (IST) 
ISSN Print edition: ISSN 1342-6893    Online edition: ISSN 2424-1970
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Conference Information
Committee IST  
Conference Date 2018-11-28 - 2018-11-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Tamachi Campus, TITECH 
Topics (in Japanese) (See Japanese page) 
Topics (in English) 4th International Workshop on Image Sensors and Imaging Systems (IWISS2018) 
Paper Information
Registration To IST 
Conference Code 2018-11-IST 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) CMOS Image Sensor with Pseudorandom Pixel Placement For Jaggy Elmination 
Sub Title (in English)  
Keyword(1) CMOS Image Sensor  
Keyword(2) Jaggy  
Keyword(3) displacement  
Keyword(4) Vernier accuracy  
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1st Author's Name Junichi Akia  
1st Author's Affiliation Kanazawa University (Kanazawa Univ.)
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Speaker Author-1 
Date Time 2018-11-28 16:30:00 
Presentation Time 90 minutes 
Registration for IST 
Paper # IST2018-61 
Volume (vol) vol.42 
Number (no) no.40 
Page pp.5-6 
#Pages
Date of Issue 2018-11-21 (IST) 


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