講演抄録/キーワード |
講演名 |
2019-09-20 15:30
A Simulation Study on a Cascasde-pipeline BSI Multi-Collection-Gate Image Sensor ○Nguyen Ngo(RU)・Anh Quang Nguyen(HUST)・Yoshiyuki Matsunaga・Taeko Ando(RU)・Kohsei Takehara(KINDAI)・Kazuhiro Shimonomura・Takeharu Goji Etoh(RU) |
抄録 |
(和) |
(まだ登録されていません) |
(英) |
This paper proposes a novel design of an ultra-high-speed image sensor. A light guide pipe or a convex pyramid charge collector is utilized to guide electrons from the backside photoelectron conversion layer to the frontside. The pixel configuration at the front side is divided into 4 concentric areas (guidance, collection, in-situ storage, and readout) with the cascade pipeline structure. Multi-furcation of each collection gate increases the frame count and lowers the readout rate from the outmost readout circuits. The simulation results show that the sensor can achieve the frame rate at 1 Gfps with 5.8% of crosstalk. Signals are then transferred to a stacked memory chip for continuous recording. |
キーワード |
(和) |
/ / / / / / / |
(英) |
Multi-collection-gate / ultra-high-speed / cascade-pipeline / / / / / |
文献情報 |
映情学技報, vol. 43, no. 31, IST2019-51, pp. 33-36, 2019年9月. |
資料番号 |
IST2019-51 |
発行日 |
2019-09-13 (IST) |
ISSN |
Print edition: ISSN 1342-6893 Online edition: ISSN 2424-1970 |
PDFダウンロード |
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