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Paper Abstract and Keywords
Presentation 2022-03-28 09:30
3-Layer Stacked Pixel-Parallel CMOS Image Sensors Using Hybrid Bonding of SOI Wafers
Masahide Goto, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi (NHK), Takuya Saraya, Masaharu Kobayashi (The Univ. of Tokyo), Eiji Higurashi (AIST), Hiroshi Toshiyoshi, Toshiro Hiramoto (The Univ. of Tokyo)
Abstract (in Japanese) (See Japanese page) 
(in English) We report 3-layer stacked pixel-parallel CMOS image sensors developed for the first time. The hybrid bonding of silicon-on-insulator (SOI) wafers through embedded Au electrodes in the SiO2 insulators on the front and back sides realizes both face-to-face and face-to-back bonding, realizing a multi-layer stacked device. A 3-layered pixel circuit is developed to confirm the linear response of 16-bit digital signal output. A prototype sensor with 160 × 120 pixels successfully captures video images, demonstrating the feasibility of multi-layered sensors of high performance as well as multi-functions including signal processing, memory, and computing for applications such as high-quality video cameras, measurements, recognition, robots, and various IoT devices.
Keyword (in Japanese) (See Japanese page) 
(in English) CMOS image sensor / 3D integration / bonding / silicon-on-insulator (SOI) / A/D converter / / /  
Reference Info. ITE Tech. Rep., vol. 46, no. 14, IST2022-11, pp. 5-8, March 2022.
Paper # IST2022-11 
Date of Issue 2022-03-21 (IST) 
ISSN Print edition: ISSN 1342-6893  Online edition: ISSN 2424-1970
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Conference Information
Committee IST  
Conference Date 2022-03-28 - 2022-03-28 
Place (in Japanese) (See Japanese page) 
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Paper Information
Registration To IST 
Conference Code 2022-03-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 3-Layer Stacked Pixel-Parallel CMOS Image Sensors Using Hybrid Bonding of SOI Wafers 
Sub Title (in English)  
Keyword(1) CMOS image sensor  
Keyword(2) 3D integration  
Keyword(3) bonding  
Keyword(4) silicon-on-insulator (SOI)  
Keyword(5) A/D converter  
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1st Author's Name Masahide Goto  
1st Author's Affiliation NHK Science & Technology Research Laboratories (NHK)
2nd Author's Name Yuki Honda  
2nd Author's Affiliation NHK Science & Technology Research Laboratories (NHK)
3rd Author's Name Masakazu Nanba  
3rd Author's Affiliation NHK Science & Technology Research Laboratories (NHK)
4th Author's Name Yoshinori Iguchi  
4th Author's Affiliation NHK Science & Technology Research Laboratories (NHK)
5th Author's Name Takuya Saraya  
5th Author's Affiliation The University of Tokyo (The Univ. of Tokyo)
6th Author's Name Masaharu Kobayashi  
6th Author's Affiliation The University of Tokyo (The Univ. of Tokyo)
7th Author's Name Eiji Higurashi  
7th Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
8th Author's Name Hiroshi Toshiyoshi  
8th Author's Affiliation The University of Tokyo (The Univ. of Tokyo)
9th Author's Name Toshiro Hiramoto  
9th Author's Affiliation The University of Tokyo (The Univ. of Tokyo)
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Speaker
Date Time 2022-03-28 09:30:00 
Presentation Time 25 
Registration for IST 
Paper # ITE-IST2022-11 
Volume (vol) ITE-46 
Number (no) no.14 
Page pp.5-8 
#Pages ITE-4 
Date of Issue ITE-IST-2022-03-21 


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