| Paper Abstract and Keywords |
| Presentation |
2022-09-22 14:00
Low-Noise Multi-Gate Pixel Transistor for Sub-Micron Pixel CMOS Image Sensors
Koichi Baba, Shota Kitamura, Naohiko Kimizuka, Akiko Honjo, Toshihiro Kurobe, Hideomi Kumano, Takuya Toyofuku (SSS), Kouhei Takeuchi, Shota Nishimura (SCK), Akihiko Kato, Tomoyuki Hirano, Yusuke Oike (SSS) |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
As the pixel size of CMOS image sensors (CIS) is rapidly decreasing to sub-micron pixels due to strong demand from mobile applications, a low-noise multi-gate pixel transistor for sub-micron pixel CIS has been proposed. It has been fully customized for pixel transistors of source follower amplifiers in CIS by a shallow trench isolation full-etching process. Compared to a planar-type pixel transistor with the same footprint, the random telegraph signal and 1/f noise has been decreased by 91% and 48%, respectively. The transconductance has been improved by 43%. A prototype CIS with 0.7μm pixels successfully presented a full image capture for the first time using multi-gate pixel transistors. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
CMOS Image Sensor / Low Noise / Pixel Transistor / RTS / 1/f Noise / / / |
| Reference Info. |
ITE Tech. Rep., vol. 46, no. 29, IST2022-35, pp. 5-8, Sept. 2022. |
| Paper # |
IST2022-35 |
| Date of Issue |
2022-09-15 (IST) |
| ISSN |
Print edition: ISSN 1342-6893 Online edition: ISSN 2424-1970 |
| Download PDF |
|