ITE Technical Group Submission System
Advance Program
Online Proceedings
[Sign in]
 Go Top  Go Back   Prev IST Conf / Next IST Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technial Committee on Information Sensing (IST) [schedule] [select]
Chair Shigetoshi Sugawa (Tohoku Univ.)
Vice Chair Isamu Takayanagi (Aptina)
Secretary Masayuki Ikebe (Hokkaido Univ.)

Technical Committee on Integrated Circuits and Devices (IEICE-ICD) [schedule] [select]
Chair Takeshi Yamamura (Fujitsu Labs.)
Vice Chair Minoru Fujishima (Hiroshima Univ.)
Secretary Toshimasa Matsuoka (Osaka Univ.), Osamu Watanabe (Toshiba)
Assistant Shinichi Ouchi (AIST), Takeshi Yoshida (Hiroshima Univ.), Akira Tsuchiya (Kyoto Univ.), Cong-Kha Pham (UEC)

Conference Date Thu, Jul 4, 2013 09:30 - 18:30
Fri, Jul 5, 2013 09:15 - 18:35
Topics Analog circuits, Mixed signal, RF and Sensor I/F, etc. 
Conference Place San Refre Hakodate 
Address 2-14 Ohmori-cho, Hakodate-shi, 040-0034 Japan
Transportation Guide http://www.city.hakodate.hokkaido.jp/keizai/roudou/s-refre/access/address.html
Contact
Person
Prof. Ikuma Sato
+81-138-23-2556 (Venue)
Sponsors IEEE SSCS Japan/Kansai Chapter, IEE-ECT

Thu, Jul 4 AM 
09:30 - 12:25
(1)
IEICE-ICD
09:30-09:55 93% Power Reduction by Automatic Self Power Gating (ASPG) and Multistage Inverter for Negative Resistance (MINR) in 0.7V, 9.2uW, 39MHz Crystal Oscillator Shunta Iguchi (Univ. of Tokyo), Akira Saito (STARC), Yunfei Zheng (Univ. of Tokyo), Kazunori Watanabe (STARC), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo)
(2)
IEICE-ICD
09:55-10:20 A Low Power Fast Lock All-Digital CDR with TDC Combined DLL Yuki Urano, Won-Joo Yun, Kaoru Kohira, Teruo Jyo, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.)
(3)
IEICE-ICD
10:20-10:45 Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near-Threshold Logic Circuits Hiroshi Fuketa (Univ. of Tokyo), Masahiro Nomura (STARC), Makoto Takamiya, Takayasu Sakurai (Univ. of Tokyo)
  10:45-10:55 Break ( 10 min. )
(4)
IEICE-ICD
10:55-11:40 [Invited Talk]
32 Gb/s Data-Interpolator Receiver with 2-tap DFE
Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida (Fujitsu Lab. Ltd.), Hiroki Miyaoka (FSL), Masanori Hoshino (FMSL), Yoichi Koyanagi (Fujitsu Lab. Ltd.), Takuji Yamamoto (FLA), Sanroku Tsukamoto, Hirotaka Tamura (Fujitsu Lab. Ltd.)
(5)
IEICE-ICD
11:40-12:25 [Invited Talk]
Low power short range wireless communication LSI and interface
Mitsuhiko Noda (LAPIS SEMICONDUCTOR)
  12:25-13:50 Lunch Break ( 85 min. )
Thu, Jul 4 PM 
13:50 - 18:30
(6)
IEICE-ICD
13:50-14:35 [Invited Talk]
Panasonic's approach for energy management and microcontroller application in HEMS
Yoshihisa Homma (Panasonic)
(7)
IEICE-ICD
14:35-15:20 [Invited Talk]
The Evolutional Directions of Automotive Semiconductors:
-- From the Viewpoint of Computing and Sensing Technologies --
Hideaki Ishihara (DENSO)
  15:20-15:30 Break ( 10 min. )
(8)
IEICE-ICD
15:30-16:15 [Invited Talk]
*
Yoshihide Iwata, Hitoshi Sugawara (TIJ)
(9)
IEICE-ICD
16:15-17:00 [Invited Talk]
Low-voltage Non-volatile Memory Devices Technology and System Application
Masanori Hayashikoshi (Renesas Electronics)
  17:00-17:10 Break ( 10 min. )
(10)
IEICE-ICD
17:10-18:30 [Panel Discussion]
Extending analog-interface function increasingly for micro computer
Toshihiko Hamasaki (HIT), Yoshihisa Homma (Panasonic), Hideaki Ishihara (Denso), Yoshihide Iwata (TIJ), Masanori Hayashikoshi (Renesas), Mitsuhiko Noda (Lapis), Yoshiyasu Dohi (Fujitsu Lab.)
Fri, Jul 5 AM 
09:15 - 11:55
(11)
IST
09:15-10:05 [Invited Talk]
Microconotoller and Semiconductor Devices as "Components"
Junichi Akita (Kanazawa Univ.)
(12)
IEICE-ICD
10:05-10:30 Low-Power EEG Sensor ASIC Design with Wireless Transmitter Takatsugu Kamata, Jun Wang (Osaka Univ.), Takashi Okada (Proassist), Kenji Ohara (Osaka Univ.), Aiko Miyata (Proassist), Toshimasa Matsuoka (Osaka Univ.)
  10:30-10:40 Break ( 10 min. )
(13)
IST
10:40-11:05 Low-power,small-size transmitter module with metamaterial antenna Kazuki Hiraishi, Toshiki Wada, Keishi Kubo, Yutaro Otsu, Masayuki Ikebe, Eiichi Sano (Hokkaido Univ.)
(14)
IEICE-ICD
11:05-11:30 Development of 64 Linear Array ROIC for 3D Imaging LADAR Akihito Hirai, Koji Tsutsumi, Nobuki Kotake, Hidenobu Tsuji, Masaharu Imaki, Syumpei Kameyama, Eiji Taniguchi, Yoshihito Hirano (Mitsubishi Electric)
(15)
IEICE-ICD
11:30-11:55 0.5V Start-up Feed Forward Controlled Single-Inductor Dual-Output Boost On-chip DC-DC Converter for Sensor Network Application Yasunobu Nakase, Yasuhiro Ido, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu (Renesas)
  11:55-13:20 Lunch Break ( 85 min. )
Fri, Jul 5 PM 
13:20 - 18:35
(16)
IEICE-ICD
13:20-14:05 [Invited Talk]
Design Techniques for High-Performance Continuous-Time Delta-Sigma Modulators
-- for realizing high efficient and high SNDR Modulators --
Shiro Dosho (Pana)
(17)
IEICE-ICD
14:05-14:30 A Voltage Scaling 0.25-1.8 V Delta-Sigma Modulator with Inverter-Opamp Self-Configuring Amplifier Kentaro Yoshioka, Yousuke Toyama, Teruo Jyo, Hiroki Ishikuro (Keio Univ.)
(18)
IEICE-ICD
14:30-14:55 A 1.0-V 12-bit Digitally Calibrated SAR ADC Using Hybrid DAC Technique Furuta Masanori, Hirotomo Ishii, Tomohiko Sugimoto, Toru Okawa, Masazumi Shiochi, Tetsuro Itakura (Toshiba Corp.)
  14:55-15:05 Break ( 10 min. )
(19)
IST
15:05-15:30 Low power dissipation in single-slope ADC with multi-phase TDC Daisuke Uchida, Makito Someya, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano (Hokadido Univ.)
(20)
IEICE-ICD
15:30-15:55 1-GHz, 8-bit Subranging ADC(1)
-- Low-power techniques --
Masataro Iwamoto, Wataru Yoshimura, Futoshi Shimozono, Daiki Tabira, Kenichi Ohhata (Kagoshima Univ.)
(21)
IEICE-ICD
15:55-16:20 1-GHz, 8-bit Subranging ADC (2)
-- Experimental results and failure analysis --
Wataru Yoshimura, Masataro Iwamoto, Futoshi Shimozono, Daiki Tabira, Kenichi Ohhata (Kagoshima Univ.)
  16:20-16:30 Break ( 10 min. )
(22)
IEICE-ICD
16:30-16:55 A Intermittently Operating LNA with Optimal On-Time Controller for Pulse-Based Inductive-Coupling Transceiver Teruo Jyo, Kaoru Kohira, Yuki Urano, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.)
(23)
IEICE-ICD
16:55-17:20 A Study on 1/f Noise Characteristic in Independent-Double-Gate-FinFET Hideo Sakai (Keio Univ.), Shin-ichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Yuki Ishikawa, Junichi Tsukada, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Meishoku Masahara (AIST), Hiroki Ishikuro (Keio Univ.)
(24)
IEICE-ICD
17:20-17:45 Equivalent circuit representation of silicon substrate coupling of active RF components Naoya Azuma, Makoto Nagata (Kobe univ.)
(25)
IEICE-ICD
17:45-18:10 Failure mode analysis for flip-flops at low voltages Takafumi Fujita, Junya Kawashima (Kyouto Univ.), Hiroyuki Ochi (Ritsumeikan Univ.), Hiroshi Thutsui, Takashi Sato (Kyouto Univ.)
(26)
IEICE-ICD
18:10-18:35 1um Thickness Surface Electromyogram Measurement Sheet with 2V Organic Transistors for Prosthetic Hand Control Hiroshi Fuketa, Kazuaki Yoshioka, Yasuhiro Shinozuka, Koichi Ishida, Tomoyuki Yokota, Naoji Matsuhisa, Yusuke Inoue, Masaki Sekino, Tsuyoshi Sekitani, Makoto Takamiya, Takao Someya, Takayasu Sakurai (Univ. of Tokyo/JST)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 40 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
IST Technial Committee on Information Sensing (IST)   [Latest Schedule]
Contact Address Masayuki Ikebe (Hokkaido University)
TEL 011-706-7689
E-:ibeisti 
IEICE-ICD Technical Committee on Integrated Circuits and Devices (IEICE-ICD)   [Latest Schedule]
Contact Address Takeshi Yoshida (Hiroshima University)
TEL 082-424-7643,FAX 082-424-7643
E-:tdsl-u 


Last modified: 2013-05-13 11:04:08


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 

[Return to IEICE-ICD Schedule Page]   /   [Return to IST Schedule Page]   /  
 
 Go Top  Go Back   Prev IST Conf / Next IST Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to ITE Web Page]


The Institute of Image Information and Television Engineers (ITE), Japan