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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IST |
2022-03-28 16:10 |
Online |
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3.2 Megapixel 3D-Stacked Charge Focusing SPAD for Low-Light Imaging and Depth Sensing Ayman Abdelghafar, Kazuhiro Morimoto, Junji Iwata, Mahito Shinohara, Hiroshi Sekine, Hiroyuki Tsuchiya, Yukihiro Kuroda, Kenzo Tojima, Wataru Endo, Yu Maehashi, Yasuharu Ota, Tomoya Sasago, Shintaro Maekawa, Shingo Hikosaka, Taikan Kanou, Aiko Kato, Tomoyuki Tezuka, Satoshi Yoshizaki, Toshiyuki Ogawa, Kosei Uehira, Alice Ehara, Fumihiro Inui, Yasushi Matsuno, Katsuhito Sakurai, Takeshi Ichikawa (Canon) |
A new generation of scalable photon counting image sensors, featuring zero read noise and 100ps temporal resolution. New... [more] |
IST2022-21 pp.47-51 |
IST |
2017-09-25 15:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Region Control Oriented Stacked CMOS Image Sensor with Array-Parallel ADC Architecture Takahito Yamauchi, Tomohiro Takahashi (Sony Semiconductor Solutions), Yuichi Kaji (Sony Electronics Incorporated), Yasunori Tsukuda, Shinichiro Futami (Sony Semiconductor Solutions), Katsuhiko Hanzawa, Ping Wah Wong, Frederick Brady, Phil Holden, Thomas Ayers (Sony Electronics Incorporated), Kyohei Mizuta, Susumu Ohki, Keiji Tatani, Takashi Nagano (Sony Semiconductor Solutions), Hayato Wakabayashi (Sony Electronics Incorporated), Yoshikazu Nitta (ony Semiconductor Solutions) |
A 4.1Mpix 280fps stacked CMOS image sensor with array-parallel ADC architecture is developed for region control applicat... [more] |
IST2017-57 pp.35-38 |
IST |
2014-03-14 11:30 |
Tokyo |
NHK |
3D Stacked CMOS Image Sensor Taku Umebayashi, Tomoharu Ogita, Shunichi Sukegawa, Tsutomu Nakajima, Hiroshi Kawanobe (Sony), Ken Koseki (Sony LSI Design), Tsutomu Haruta, Hiroshi Takahashi (Sony), Keishi Inoue (Sony Semiconductor), Toshifumi Wakano, Yusuke Mada, Koji Fukumoto, Takashi Nagano, Yoshikazu Nitta, Teruo Hirayama (Sony) |
We have developed 3D stacked CMOS image sensor. This technology is a Back-illuminated CIS stacking on a logic substrate.... [more] |
IST2014-9 p.5 |
IST |
2014-03-14 12:00 |
Tokyo |
NHK |
Three-dimensional Structures for High Saturation Signals and Crosstalk Suppression in 1.20 um Pixel Back-Illuminated CMOS Image Sensor Takekazu Shinohara, Kazufumi Watanabe (Sony Semiconductor), Takashi Abe, Kazunobu Ohta (Sony), Hajime Nakayama (Sony Semiconductor), Takafumi Morikawa, Keiichi Ohno (Sony), Dai Sugimoto (Sony Semiconductor), Shingo Kadomura, Teruo Hirayama (Sony) |
We propose two technologies, vertical transfer gate (VTG) and buried shielding metal (BSM), that can be applied to 1.20 ... [more] |
IST2014-10 pp.7-10 |
IST |
2010-05-31 13:00 |
Tokyo |
Univ. of Tokyo |
[Tutorial Invited Lecture]
Low-noise CMOS Image Sensor for High-quality Imaging Hirofumi Sumi (Sony) |
Recently, CMOS image sensors have been used widely in the high-volume markets of mobile phones, digital still cameras an... [more] |
IST2010-25 pp.13-16 |
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