ITE Technical Group Submission System
Conference Schedule
Online Proceedings
[Sign in]
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IEICE-ICD, IEICE-SDM, IST [detail] 2016-08-01
10:00
Osaka Central Electric Club A fast-start up and fully-integrated 32-MHz clock generator for intermittent VLSI systems
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.)
This paper proposes a fully integrated 32-MHz relaxation oscillator (ROSC)
capable of fast start-up time operation f... [more]

IEICE-ICD, IEICE-SDM, IST [detail] 2016-08-03
14:15
Osaka Central Electric Club Impacts of Flexible V_th control and Low Process Variability of SOTB to Ultra-low Voltage Designs
Yasuhiro Ogasahara, Hanpei Koike (AIST)
This paper discusses impacts of flexible Vth control, low process variability, and steep SS with small on-current of new... [more]
IEICE-ICD, IEICE-SDM, IST [detail] 2016-08-03
15:05
Osaka Central Electric Club Increased Drain-Induced Variability and Within-Device Variability in Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm
Tomoko Mizutani, Kiyoshi Takeuchi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo)
The effects of drain voltage in threshold voltage variability in extremely narrow silicon nanowire (NW) channel FETs are... [more]
IST 2012-05-28
13:00
Tokyo   [Poster Presentation] Mismatch Analysis of a Distributed Ramp Signal Generator for In-Pixel Analog to Digital Conversion
Kaita Imai, Keita Yasutomi, Keiichiro Kagawa, Kawahito Shoji (Shizuoka Univ.)
To implement ADC in every pixel is effective for high-speed high-resolution CMOS image sensors. Single slope ADC is a go... [more] IST2012-19
pp.13-14
IST, IEICE-ICD 2011-07-22
09:25
Hiroshima Hiroshima Institute of Technology An All-Digital On-Chip PMOS and NMOS Process Variability Monitor Utilizing Shared Buffer Ring and Ring Oscillator
Tetsuya Iizuka, Kunihiro Asada (Univ. of Tokyo)
This paper proposes an all-digital process variability monitor based on a shared structure of a buffer ring and a ring o... [more]
IST, IEICE-ICD 2010-07-22
10:45
Osaka Josho Gakuen Osaka Center Buffer-Ring-Based All-Digital On-Chip Monitor for PMOS and NMOS Process Variability
Tetsuya Iizuka, Toru Nakura, Kunihiro Asada (Univ. of Tokyo)
In this paper, we propose an all-digital process variability monitor which utilizes a simple buffer ring with a pulse co... [more]
 Results 1 - 6 of 6  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format


[Return to Top Page]

[Return to ITE Web Page]


The Institute of Image Information and Television Engineers (ITE), Japan